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Synplicity Announces Best-in-Class Synthesis Support for Xilinx's Virtex-4 and Lattice Semiconductor's LatticeECP and LatticeEC FPGAs
Identify RTL Debug Tool Integrated Into Synplify Pro
FPGA Synthesis Software
SUNNYVALE, Calif.—(BUSINESS WIRE)—Sept. 13, 2004—
Synplicity Inc. (Nasdaq:SYNP), a leading supplier of software for
the design and verification of semiconductors, today announced the
latest version of its FPGA synthesis and physical synthesis software
solutions. The Synplify Pro(R) 7.7 synthesis tool features several
enhancements to improve device performance and quality of results
(QoR), including support for the latest FPGA devices from Xilinx and
Lattice Semiconductor. The new version of the Synplify Pro software
features timing-driven synthesis support for Xilinx's Virtex-4 FPGAs,
delivering best-in-class performance for these leading-edge devices.
(See press release announced today titled "Synplicity Announces Full
Support for Xilinx Virtex-4 Devices") The Synplify Pro 7.7 software
also includes support for Lattice Semiconductor's LatticeECP and
LatticeEC low-cost FPGA device families. Enhancements have also been
added to the Amplify(R) FPGA 3.7 physical synthesis software in order
to improve timing closure for high-performance FPGAs.
"Synplicity has been the industry leader in FPGA synthesis tools
for the past three years because we believe we provide the best
overall quality of results and technical support available for FPGA
synthesis," said Jeff Garrison, director of marketing for FPGA
products at Synplicity. "With this latest version of our Synplify Pro
software, Synplicity once again provides high-quality EDA support for
leading-edge devices immediately upon availability from the vendor. We
believe the performance benefits users will experience with the latest
versions of the Amplify FPGA and Synplify Pro software will exceed
those of alternative solutions."
Enhanced Support for LatticeECP and LatticeEC FPGAs
The Synplify Pro software also features enhanced mapping
technology for Lattice Semiconductor's new LatticeECP and LatticeEC
families of low-cost FPGA devices, providing Lattice users with
optimal performance. New arithmetic function generators built into the
Synplify(R) and Synplify Pro products offer DSP designers greatly
improved timing performance for their math-intensive applications.
Designers can now take full advantage of the LatticeECP-DSP's
best-in-class, dedicated multiplier/accumulator DSP resources.
"Synplicity continues to deliver our mutual customers FPGA
synthesis products that offer best-in-class quality of results,
runtime and productivity advantages," said Tim Schnettler, director of
design tools marketing for Lattice Semiconductor. "We believe
customers using this latest version of Synplicity's Synplify Pro
software will see a significant improvement in performance and area
utilization for our LatticeECP and LatticeEC FPGA families."
Enhanced Physical Synthesis
The latest version of the Amplify FPGA physical synthesis software
includes improved timing correlation to final place and route, as well
as a new island-based timing report that allows designers to view and
constrain all physically connected paths in designs that have negative
slack. This feature enables users to perform fewer place-and-route
iterations, and when combined with the software's improved timing
correlation algorithms, the island-based timing report allows
designers to close on aggressive timing goals quickly.
RTL Debug Integrated Into the Synplify Pro Software
Synplicity's Identify(R) Instrumentor product has been integrated
into the Synplify Pro software solution for easy access to RTL
instrumentation and debug. The Identify software is the industry's
only software tool that allows FPGA designers and ASIC prototype
designers to functionally debug their hardware directly in their RTL
source code. Using the Identify software, designers are able to
pinpoint problems in their Verilog or VHDL code, enabling them to save
weeks in design time. Through the end of 2004, customers in North
America who purchase a new license of the Synplify Pro software will
receive the Identify RTL Debugger, free of charge, for use inside the
Synplify Pro solution.
Pricing and Availability
The Synplify 7.7 and Amplify 3.7 software are available now.
Pricing for the Synplify software starts at $9,500 (U.S.) and pricing
for the Amplify Physical Optimizer(TM) software starts at $29,000
(U.S.). For more information visit Synplicity's Web site at
http://www.synplicity.com.
About Synplicity
Synplicity(R) Inc. (Nasdaq:SYNP) is a leading supplier of
innovative synthesis, verification and physical implementation
software solutions that enable the rapid and effective design and
verification of semiconductors. Synplicity's high-quality,
high-performance tools significantly reduce costs and time-to-market
for FPGA, Structured/Platform ASIC and cell-based/COT ASIC designers.
The company's underlying Behavior Extracting Synthesis Technology(R)
(BEST(TM)), which is embedded in its logical, physical and
verification tools, and has led to Synplicity's top position in FPGA
synthesis, now provides the same fast runtimes and quality of results
to ASIC and COT customers. The company's fast, easy-to-use products
support industry standard design languages (VHDL and Verilog) and run
on popular platforms. Synplicity employs over 280 people in its 20
facilities worldwide. Synplicity is headquartered in Sunnyvale,
California. For more information visit http://www.synplicity.com.
Forward-Looking Statements
This press release contains forward-looking statements including,
but not limited to, statements regarding Synplicity's performance in
the FPGA market and the performance, achievements and benefits of the
latest versions of the Synplify Pro, Amplify and Identify software,
both individually and used in conjunction with third-party products.
In some cases, you will be able to identify forward-looking statements
by terminology such as "may," "will," "should," "expects," "believes"
or the negative of these terms or other comparable terminology. These
statements are only predictions and involve known and unknown risks,
uncertainties and other factors that may cause the actual results to
differ materially from the forward-looking statements, including the
performance and benefits of Synplicity's software relative to relevant
industry methods or standards, design flaws, design difficulties or
other problems with Synplicity's software, and the growth and changing
technical requirements in the FPGA market. For additional information
and considerations regarding the risks faced by Synplicity, see its
annual report on Form 10-K for the year ended December 31, 2003 as
filed with the Securities and Exchange Commission, as well as other
periodic reports filed with the SEC from time to time, including its
quarterly reports on Form 10-Q. Although Synplicity believes that the
expectations reflected in the forward-looking statements are
reasonable, Synplicity cannot guarantee the future performance or
achievements of its software. In addition, neither Synplicity nor any
other person assumes responsibility for the accuracy or completeness
of these forward-looking statements. Synplicity disclaims any
obligation to update information contained in any forward-looking
statement.
Synplicity, Behavior Extracting Synthesis Technology, Identify,
Synplify, Synplify Pro and Amplify are registered trademarks of
Synplicity Inc. BEST and Physical Optimizer are trademarks of
Synplicity Inc. All other brands or products are the trademarks or
registered trademarks of their respective owners.
Contact:
Synplicity Inc.
Jeff Garrison, 408-215-6000 (Readers)
jeff@synplicity.com
or
Porter Novelli
Steve Gabriel, 408-369-1500 (PR)
steve.gabriel@porternovelli.com
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